第18卷第1期 2010年1月
1004-924X(2010)01-0273-08
文章编号
光学精密工程
Optics and Precision Engineering
Vol.18No.1 Jan,2010
面阵CCD彩色视频图像实时采集系统的设计
冉峰，杨辉，黄舒平
（上海大学微电子研究与开发中心，上海200072）
摘要：为了实现用面阵CCD实时采集彩色视频图像，设计了一种彩色视额图像实时采集系统。在分析SONY面阵CCD 器件ICX424AQ的结构参数和彩色视频图像采集原理的基础上，实现了CCD控制时序的产生和整个采集系统的时序控制逐辑。分析了CCD器件的主要噪声来源，采用相关双采样技术滤除了视频信号中的复位噪声和1/了等低频噪声，提高了系统的信噪比。由于采用的面阵CCD芯片表面覆盖有Bayer彩色滤波阵列(CFA)，因此每个像素点只有一个颜色分量。为了获得全彩图像，采用一种改进的双线性插值算法来获得每个像素点上丢失的色度信息，较好地兼顾了插值效果和硬件实现复杂程度。该设计采用CCD逐行扫描工作方式，爆光时间为0.32ms时，所有像素信号可依次读出。整个系统采用FPGA作为核心控制器件，读取的CCD信号经过插值处理，实时地通过发送芯片Sil1162以DVI格式发送到TFT-LCD屏上显示。
关键词：面阵CCD；图像采集；现场可编程门陈列；相关双采样；彩色摘值
中图分类号：TN941.1;TN386.5
文献标识码：A
Design of real-time color video capture system for area array CCD
RANFeng，YANGHui,HUANG Shu-ping
(MicroelectronicResearch andDevelopment Center,ShanghaiUniversity,Shanghai 200072,China) Abstract: A real-time color video capture system is established to realize the color video capturing by an area array CCD. The hardware and software designs of the color video capture system of area array CCD ICX424AQ presented by Sony company are analyzed, and the structure parameters of the area array CCD and the color video gathering principle of the capature system are introduced. Then, the CCD control sequence and the timing logic of the whole capture system is realized. Furthermore,the noises of the video signal (KTC noise and 1/ f noise) are filtered by using the Correlated Double Sam pling (CDS) technique, and the signal-to-noise ratio of the system is enhanced. Because the area array CCD image sensor is covered by a Bayer Color Filter Array (CFA), each pixel has only one component of three primary colors, In order to obtain full chromaticity at every pixel, an enhanced bilinear algo-rithm is presented to obtain a compromise solution between the complex of hardware implementation and image quality through interpolating. The CCD is worked under progressive scan mode and all pix el signals can be read out simultaneously at the exposing time of o.32 ms.The whole system is con trolled by a Field Programming Gate Array(FPGA), and the pixel data readout is interpolated and then transmitted by the transmitting chip Sill162. Finally, the designed video is displayed on a TFT-
收稿日期：2009-04-22；修订日期：2009-05-25.
基金项目：上海市科委"创新行动计划"项目集成电路设计专项（No.08706201800)；上海市科委2008年度"创新行动
计划"资助项目（No.08706201800)上海大学研究生创新基金项目（No.SHUCX092347）